基于双处理器系统的图形生成电路研究与应用  

Research and implementation of graphics generation circuit based on double processor

作　　者：高伟林 曹峰 郭超 

机构地区：[1]苏州长风航空电子有限公司,江苏苏州215151

出　　处：《电子技术应用》2016年第2期9-13,共5页Application of Electronic Technique

基　　金：国家863高技术研究发展计划(2011AA110101)

摘　　要：机载显示器分辨率越来越高,显示内容越来越复杂,这对图形生成电路提出了更高的要求。提出了一种基于双处理器系统的图形生成电路实现方法,以两片DSP处理器作为绘图核心,配合FPGA和SDRAM帧存构建硬件平台,由主DSP进行绘图任务分配,并将任务分配结果通过Linkport口传递给从DSP,主从DSP根据任务分配结果并行完成图形生成算法运算,从DSP通过Linkport口向主DSP发送图形数据,主DSP将图形数据写入SDRAM帧存中,配合FPGA对SDRAM进行乒乓操作完成图形数据的实时生成与显示。实验结果表明,该方法与单处理器方案相比,在功耗仅增加15%的情况下图形生成效率可提高53%以上,生成一幅1 024×768的EFIS电子飞行显示系统画面帧率可达86 f/s。High performance graphics generation circuit is required due to higher resolution and more complicated display content of the cockpit display system. A method about graphics generation circuit based on double processor is proposed in this paper. Hard-ware platform is designed based on two chip of DSP in cooperation with FPGA and SDRAM frame buffer. Graphics generation task is distributed by the main DSP and the result of task distribution is sent to the secondary DSP through linkport. Graphics genera-tion algorithms are performed by the two DSP. The data produced by the secondary DSP is sent to the main DSP by linkport. The graphics data is written to the SDRAM frame buffer by the main DSP. The graphics can be generated and display by ping- pong operation on SDRAM cooperated with FPGA. Experiments show that the efficiency of the graphics generation can be increased by 53 % in condition of the power increased by 15 %. The EFIS display with 1 024 × 768 resolution can be generated and the frame rate is 86 f / s.

关 键 词：双处理器 图形生成电路 Linkport端口 绘图任务分配 

分 类 号：V243.6[航空宇航科学与技术—飞行器设计]