Darwin:a neuromorphic hardware co-processor based on Spiking Neural Networks  

作　　者：Juncheng SHEN De MA Zonghua GU Ming ZHANG Xiaolei ZHU Xiaoqiang XU Qi XU Yangjing SHEN Gang PAN 

机构地区：[1]College of Computer Science, Zhejiang University [2]Institute of VLSI Design, Zhejiang University [3]Key Laboratory of RF Circuits and Systems, Ministry of Education, Hangzhou Dianzi University

出　　处：《Science China(Information Sciences)》2016年第2期228-232,共5页中国科学（信息科学）（英文版）

基　　金：supported by National Basic Research Program of China(973 Program)(Grant No.2013CB3295-04)

摘　　要：Broadly speaking, the goal of neuromorphic engineering is to build computer systems that mimic the brain. Spiking Neural Network（SNN） is a type of biologically-inspired neural networks that perform information processing based on discrete-time spikes, different from traditional Artificial Neural Network（ANN）.Hardware implementation of SNNs is necessary for achieving high-performance and low-power. We present the Darwin Neural Processing Unit（NPU）, a neuromorphic hardware co-processor based on SNN implemented with digitallogic, supporting a maximum of 2048 neurons, 20482= 4194304 synapses, and 15 possible synaptic delays.The Darwin NPU was fabricated by standard 180 nm CMOS technology with an area size of 5 × 5 mm2and70 MHz clock frequency at the worst case. It consumes 0.84 m W/MHz with 1.8 V power supply for typical applications. Two prototype applications are used to demonstrate the performance and efficiency of the hardware implementation.Broadly speaking, the goal of neuromorphic engineering is to build computer systems that mimic the brain. Spiking Neural Network（SNN） is a type of biologically-inspired neural networks that perform information processing based on discrete-time spikes, different from traditional Artificial Neural Network（ANN）.Hardware implementation of SNNs is necessary for achieving high-performance and low-power. We present the Darwin Neural Processing Unit（NPU）, a neuromorphic hardware co-processor based on SNN implemented with digitallogic, supporting a maximum of 2048 neurons, 20482= 4194304 synapses, and 15 possible synaptic delays.The Darwin NPU was fabricated by standard 180 nm CMOS technology with an area size of 5 × 5 mm2and70 MHz clock frequency at the worst case. It consumes 0.84 m W/MHz with 1.8 V power supply for typical applications. Two prototype applications are used to demonstrate the performance and efficiency of the hardware implementation.

关 键 词：neuromorphic computing Spiking Neural Networks（SNN） digital VLSI 

分 类 号：TP332[自动化与计算机技术—计算机系统结构] TP183[自动化与计算机技术—计算机科学与技术]