低功耗直接衬底耦合QVCO的分析与设计  

Analysis and Design for Low-Power Direct Bulk-Coupled QVCO

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作  者:戚玉华[1] 何如龙[1] 

机构地区:[1]海军工程大学电子工程学院,湖北武汉430033

出  处:《信阳师范学院学报(自然科学版)》2016年第2期253-256,共4页Journal of Xinyang Normal University(Natural Science Edition)

基  金:军队科研重点资助项目(KJ2013××××)

摘  要:设计了一款基于TSMC 0.13μm CMOS工艺实现的低功耗低相位噪声、直接衬底耦合形式的正交压控振荡器(QVCO).该QVCO采用电容抽头技术、丙类操作状态和衬底耦合技术,降低电路的功耗和面积.最终版图后仿真结果表明:该QVCO在仅消耗2 m W的情况下,在载频6 GHz处,相位噪声达到-119.11d Bc/Hz@1MHz.Design techniques for a low-power low-phase-noise CMOS LC direct bulk-coupled quadrature voltage-controlled oscillator( QVCO) was presented in TSMC 0. 13 μm CMOS technology. A capacitor tapping technique was used to lower the phase noise and achieve load-independent frequency of oscillation. Class-C operation was used to further reduce the phase noise and power consumption. Quadrature coupling was achieved using bulk coupling,leading to reduction in both power and area. Postlayout simulations showed that the QVCO achieved a measured phase noise of- 119. 11 d Bc / Hz at 1 MHz offset from the 6 GHz carrier frequency while consuming only 2 m W and occupies an area of 0. 75 mm × 0. 45 mm.

关 键 词:压控振荡器 衬底耦合 低相位噪声 低功耗 

分 类 号:TN431.1[电子电信—微电子学与固体电子学]

 

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