一种具有长复位延时的上电复位电路的设计  

Design of a Power on Reset Circuit with Long Reset Delay

作　　者：杨洁[1,2] 李阳军 黄海深[1] 杨艳军[2] 

机构地区：[1]遵义师范学院物理与机电工程学院,贵州遵义563002 [2]湖南大学物理与微电子科学学院,湖南长沙410082

出　　处：《信阳师范学院学报（自然科学版）》2016年第2期257-260,共4页Journal of Xinyang Normal University(Natural Science Edition)

基　　金：贵州省科学技术基金项目(黔科合J字LKZS[2014]27号);贵州省教育厅自然科学研究项目(黔教合KY字(2013)200号);贵州省省级重点学科项目(黔学位办[2013]18号)

摘　　要：为满足大规模So C系统对长复位延时的需求,提出了一种带有掉电检测功能的低功耗新型上电复位(POR)电路.该POR电路采用Charted 0.35μm CMOS工艺,电源电压为3.3 V,稳态工作电流仅为10μA,版图面积为130μm×110μm.仅用一个p F级的片上电容,就可以实现100 ms以上的复位延时,并且使用基准电流源,使得复位延时随温度变化不明显,当温度从-40℃变化到90℃时,复位延时从108.32 ms变到98.95ms,变化小于10%.A compact low-power on-chip power on reset circuit with a brown-out detection capability was presented for very large scale So C systems. The proposed POR circuit was designed in Charted 0. 35 μm CMOS process with power supply of 3. 3 V,the steday current is only 10 μA and the occupied area was 130 μm × 110 μm.A long reset delay of more than 100 ms was achieved by only using a picofarad-order on-chip capacitor. Moreover,reset delay was independent of temperature due to the use of temperature-compensated current reference. When temperature changed from- 40 ℃ to 90 ℃,reset delay varied from 108. 32 ms to 98. 95 ms,which means that the variation caused by temperature was less than 10%.

关 键 词：上电复位电路 掉电检测 掉电复位 长复位延时 

分 类 号：TN432[电子电信—微电子学与固体电子学]