Design of power balance SRAM for DPA-resistance  被引量:1

Design of power balance SRAM for DPA-resistance

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作  者:周可基 汪鹏君 温亮 

机构地区:[1]Institute of Circuits and Systems,Ningbo University,Ningbo 315211,China [2]State Key Laboratory of ASIC&System,Fudan University,Shanghai 201203,China

出  处:《Journal of Semiconductors》2016年第4期106-112,共7页半导体学报(英文版)

基  金:Project supported by the Zhejiang Provincial Natural Science Foundation of China(No.LQ14F040001);the National Natural Science Foundation of China(Nos.61274132,61234002);the K.C.Wong Magna Fund in Ningbo University,China

摘  要:A power balance static random-access memory(SRAM) for resistance to differential power analysis(DPA) is proposed. In the proposed design, the switch power consumption and short-circuit power consumption are balanced by discharging and pre-charging the key nodes of the output circuit and adding an additional shortcircuit current path. Thus, the power consumption is constant in every read cycle. As a result, the DPA-resistant ability of the SRAM is improved. In 65 nm CMOS technology, the power balance SRAM is fully custom designed with a layout area of 5863.6 μm^2.The post-simulation results show that the normalized energy deviation(NED) and normalized standard deviation(NSD) are 0.099% and 0.04%, respectively. Compared to existing power balance circuits, the power balance ability of the proposed SRAM has improved 53%.A power balance static random-access memory(SRAM) for resistance to differential power analysis(DPA) is proposed. In the proposed design, the switch power consumption and short-circuit power consumption are balanced by discharging and pre-charging the key nodes of the output circuit and adding an additional shortcircuit current path. Thus, the power consumption is constant in every read cycle. As a result, the DPA-resistant ability of the SRAM is improved. In 65 nm CMOS technology, the power balance SRAM is fully custom designed with a layout area of 5863.6 μm^2.The post-simulation results show that the normalized energy deviation(NED) and normalized standard deviation(NSD) are 0.099% and 0.04%, respectively. Compared to existing power balance circuits, the power balance ability of the proposed SRAM has improved 53%.

关 键 词:differential power analysis(DPA) static random access memory(SRAM) power balance information security 

分 类 号:TP333[自动化与计算机技术—计算机系统结构]

 

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