H.264解码器的帧内预测优化  

Optimization of Intra-prediction for H.264 Decoder

作　　者：张亚运[1] 孟李林[1] 景博利 

机构地区：[1]西安邮电大学电子工程学院,陕西西安710061

出　　处：《电子科技》2016年第4期63-65,70,共4页Electronic Science and Technology

摘　　要：通过对H.264帧内预测加以优化,以提高其速度。采用4×4块级流水线方式代替串行处理方式,以及自适应的流水线协调不同种类块、不同预测模式下的帧内预测,用四路并行的多功能处理单元在1个周期内计算出1列4个像素点的预测值;以"种子"法取代平面预测模式的直接计算方式。基于FPGA开发平台设计出优化后的预测电路,验证结果表明,优化电路处理一个宏块平均只需196个时钟周期。To optimize the intra-prediction of the H. 264 coding standard for improving the speed of intra-prediction,a 4 × 4 block pipeline is adopted instead of serial processing method. A adaptive pipeline is adopted which harmonizes the intra-prediction under different blocks and different prediction modes,using the four-channel parallel multifunction processing element to calculate the prediction values of four pixels in a column in one cycle. The＂seed＂method is adopted to replace the way of calculate directly in planar prediction mode. The optimized intraprediction circuit is designed by using FPGA development platform. The verification results show that the optimized intra-prediction circuit only needs 196 clock cycles in average to process a macro block.

关 键 词：H.264 流水线 帧内预测 多功能处理单元 

分 类 号：TN919.81[电子电信—通信与信息系统]