边界扫描技术在板级可测性设计中的应用探索  

The application of boundary scan technique to the design of board level testability

作　　者：李薇 

机构地区：[1]上海航空测控技术研究所,上海201601

出　　处：《电子测试》2016年第3期35-35,34,共2页Electronic Test

摘　　要：随着硬件系统的规模不断庞大,其内部精度也逐渐增加,相关的测试工作难度越来越大,在这一过程中应用边界扫描技术则能够较好的解决这一问题。本文主要探讨了边界扫描技术的原理,从设计、优化等各个方便针对边界扫描技术在板级可测性设计中的应用。最终结果提示该技术能够显著降低测试时间,对于提高系统经济价值具有较好的作用。As the size of the hardware system has a huge,is also a gradual increase in the interior accuracy,related to the difficulty of testing work is more and more big,the application of boundary scan technology in the process can solve this problem.This paper mainly discusses the principle of boundary scan technology,convenient from each design,optimization for the boundary scan test application in design of board level.The final results indicate that the technology can significantly reduce the test time,which has a good effect on improving the economic value of the system.

关 键 词：边界扫描技术 板级测试 电路板 

分 类 号：TN407[电子电信—微电子学与固体电子学]