基于FPGA的SATA主机端控制器链路层发送模块设计  

Design of FPGA-based SATA host controller in the link layer delivery

作　　者：张庆顺[1] 刘赞[1] 郭宝增[1] 张锁良[1] 

机构地区：[1]河北大学电子信息工程学院,河北保定071002

出　　处：《河北大学学报（自然科学版）》2016年第2期218-224,共7页Journal of Hebei University(Natural Science Edition)

基　　金：河北省自然科学基金资助项目(F2011201045)

摘　　要：计算机系统中SATA(serial advanced technology attachment)主机端控制器采用专用总线转换芯片和软件控制方式.为使得以FPGA(field-programmable gate array)为控制核心的电子系统可以直接使用SATA3.0硬盘作为数据存储介质,借鉴ATA1-7、SATA1.0、SATA2.0、SATA3.0等相关协议,提出了一种基于FPGA的SATA3.0主机端控制器的链路层发送功能模块的设计与实现方法,成功实现了数据在发送过程中的校验、加扰以及流量控制等相关功能.仿真结果表明:本控制器数据处理速度可达600 MB/s,验证了设计的正确性.SATA（serial advanced technology attachment）3.0 disk as a data storage medium cannot bedirectly used in electronic systems represented by FPGA（Field-programmable gate array）. Referring toATA1-7, SATA serial advanced technology attachment 1.0, SATA2.0, SATA3.0 and other relavant proto-cols,this paper proposes a design and implementation method originated from SATA3. 0 host controllerwhich is based on FPGA in the link layer of sending module. This method is successfully implemented insending data validation, scrambling and flowing control. Simulation results are also provided. The resultsshow that the data processing speed of the controller is 600 MB/s which verify the success of the design.

关 键 词：FPGA ATA协议 SATA协议 主机端控制器 

分 类 号：TP336[自动化与计算机技术—计算机系统结构]