基于隧穿二极管的集约三值全加器设计  

Design of a RTD-Based Compact Ternary Full Adder

作　　者：纪堉超 常胜[1] 王豪[1] 何进[1] 黄启俊[1] 

机构地区：[1]武汉大学物理科学与技术学院,武汉430072

出　　处：《微纳电子技术》2016年第6期353-359,共7页Micronanoelectronic Technology

基　　金：国家自然科学基金资助项目(61404094;61574102);湖北省科技支撑计划资助项目(2015CFB536);江苏省自然科学基金资助项目(BK20141218);中国博士后科学基金资助项目(2012T50688)

摘　　要：多值逻辑(MVL)相对二值逻辑具有更高的逻辑密度,可以相对简单的结构承载更多的信息,是一条值得探索的提升电路信息处理能力的途径。以共振隧穿二极管(RTD)为主要器件,设计了一种带有进位信号的集约三值全加器电路。不同于传统的设计方法,该设计结合进位信号的逻辑特点和RTD电路的特性,使用较少的器件实现了逻辑功能,极大地降低了电路的复杂度,适应于大规模MVL电路的设计。该设计弥补了MVL电路在功能级上的空缺,丰富了MVL电路的类型,对今后基于MVL发展更复杂的电路系统打下了基础。Compared with the two-valued logic,the multi-valued logic（MVL） has higher logical density and can contain more information with the simpler structure,which is a worthy exploring method for improving the information processing capacity of circuits.A compact ternary full adder circuit with the carry signal was designed with the resonant tunneling diode（RTD） as a major device.Different from the conventional design method,this design combines the logical characteristics of the carry signal and the properties of the RTD circuit to realize the logic function with fewer devices and dramatically reduce the complexity of the circuit,which is suitable for the design of large scale MVL circuits.This design fills the gap of functional MVL circuits,extends the types of MVL circuits and provides the foundation for developing complex circuit systems based on the MVL.

关 键 词：多值逻辑(MVL) 共振隧穿二极管(RTD) 门电路 三值或非门 三值全加器 

分 类 号：TN312.2[电子电信—物理电子学] TN402