基于Cadence的DDR2串扰研究与仿真  

Research and simulation of DDR2 crosstalk based on the Cadence

作　　者：董辉[1] 马祖杰 

机构地区：[1]浙江工业大学信息工程学院,浙江杭州310023

出　　处：《浙江工业大学学报》2016年第3期266-269,共4页Journal of Zhejiang University of Technology

摘　　要：随着系统的工作频率及信号边沿转换速率的不断提高,串扰对于信号完整性的影响日益突出.通过对传输线串扰形成机理的分析,使用Cadence仿真软件对系统中的DDR2SDRAM的数据线进行串扰仿真,给出了合理处理串扰问题的解决方案.对于数据线的近端串扰和远端串扰仿真分析,在理论及仿真结果的基础上,可以通过减小耦合线长度、增大耦合线间距和减小反射等方法降低串扰对于电路的影响.笔者提出了PCB设计中抑制串扰的一些有效措施,对于DDR2SDRAM的信号完整性设计有一定的指导意义.With the increase of the operating frequency and the signal edge conversion rate,the influence of crosstalk on signal integrity is becoming more and more prominent.Through the analysis of the formation mechanism of the transmission line crosstalk,the Cadence simulation software is used to simulate the crosstalk of DDR2 SDRAM in the system,It gives a reasonable solution to the problem of crosstalk process.Based on the simulation analysis of the near-end crosstalk and far-end crosstalk of the data line,it can be concluded that the influence of crosstalk on the electric circuit can be reduced through reducing the coupling line length,increasing the spacing of coupling line,and reducing reflection.At the end of this paper,some effective measures to restrain crosstalk in PCB design are proposed.It will have some guidance for the design of signal integrity of DDR2 SDRAM.

关 键 词：串扰 近端串扰 远端串扰 耦合 

分 类 号：TN972[电子电信—信号与信息处理]