PCM混合主存系统的写感知主存管理算法  

Write-Aware Memory Management in PCM-Based Hybrid Memory Systems

作　　者：何爱华[1,2] 岳丽华[2] 吴章玲[2] 郭有强[1] 

机构地区：[1]蚌埠学院计算机科学与技术系,安徽蚌埠233030 [2]中国科学技术大学计算机科学与技术学院,合肥230027

出　　处：《计算机科学与探索》2016年第6期799-810,共12页Journal of Frontiers of Computer Science and Technology

基　　金：国家自然科学基金No.61472376;高校优秀中青年骨干人才国内外访学研修重点项目No.gxfxZD2016269~~

摘　　要：相变存储器(phase change memory,PCM)凭借字节可寻址,读取速度快(纳秒级),高存储密度,低能耗等优点,在目前基于DRAM(dynamic random access memory)的主存扩展达到瓶颈的情形下,已经成为最具前途的主存存储介质之一,但是PCM有高写延迟,寿命有限等缺陷,因此出现了DRAM/PCM混合主存架构。提出了一种以减少PCM写和保持命中率为目标的混合主存管理算法——写感知的CLOCK算法(CLOCK with a write-aware strategy,CLOCKW)。已有研究主要基于写临近信息(recency of writes,RW)来预测页面写热度,CLOCKW引入内在写距离(inter-write-distance,IWD)概念,并结合写临近信息来预测页面写热度,从而把写密集页面放置在DRAM。此外,CLOCKW通过记录有限的历史写操作信息,将新置换进的页面放在合适的存储介质,避免不必要的页面迁移。最后,基于CLOCK算法的CLOCKW满足虚拟主存管理的低代价要求。实验显示,CLOCKW在保持命中率前提下,可以有效减少PCM写次数。Phase change memory （PCM） has been increasingly viewed as an attractive technology to incorporate into the memory hierarchy since the scalability of DRAM （dynamic random access memory） is approaching its limit. Al-though PCM has higher density and lower idle power consumption than DRAM while exhibiting byte-addressability and read latencies in the nanosecond range, it has poor write performance and limited endurance. Therefore, researchers have proposed hybrid memory systems involving both PCM and DRAM. This paper presents CLOCKW （CLOCK with a write-aware strategy）, a novel hybrid memory management scheme that is designed to not only minimize writes to PCM, but also maintain a high hit ratio. The purpose of CLOCKW is trying to make write-intensive pages resident in DRAM. Particularly, differing from previous studies, which use RW （recency of writes） to estimate future access patterns, this paper introduces the concept of IWD （inter-write-distance）, and combines it with RW to estimate hotness of future writes. In addition, by additionally keeping a record of a limited number of replaced pages’write references and placing the newly reached page in an appropriate storage medium when page fault occurs, unnecessary migrations between DRAM and PCM can be avoided. More importantly, CLOCKW is based on the CLOCK scheme, and its run-ning cost is affordable for virtual memory management. The evaluation shows that CLOCKW can efficiently reduce PCM writes without degrading the hit ratio.

关 键 词：相变存储器 混合主存 写感知 主存管理 

分 类 号：TP316.1[自动化与计算机技术—计算机软件与理论]