检索规则说明:AND代表“并且”;OR代表“或者”;NOT代表“不包含”;(注意必须大写,运算符两边需空一格)
检 索 范 例 :范例一: (K=图书馆学 OR K=情报学) AND A=范并思 范例二:J=计算机应用与软件 AND (U=C++ OR U=Basic) NOT M=Visual
机构地区:[1]哈尔滨工程大学信息与通信工程学院,哈尔滨150001
出 处:《微电子学》2016年第3期302-305,310,共5页Microelectronics
基 金:国家自然科学基金资助项目(61306142);黑龙江省自然科学基金资助项目(QC2014C068);中央高校基本科研业务费专项资金资助项目(HEUCF140804)
摘 要:为了提高运算放大器对电源电压的利用率,基于GSMC 0.18μm CMOS工艺模型,设计了一种高增益恒跨导轨对轨CMOS运算放大器。该运算放大器的输入级采用了互补差分对,并通过3倍电流镜法保证输入级总跨导在整个共模输入范围内恒定;为了获得较大的增益和输出摆幅,中间级采用了折叠式共源共栅结构;输出级采用了AB类输出控制电路,使输出摆幅基本实现了轨对轨。在3.3V供电电压以及1.6V输入电压下,该放大器的直流增益为126dB,单位增益带宽为50 MHz,相位裕度为65°。电路结构简单,易于调试,可大大缩减设计周期和成本。In order to improve the utilization ratio of the power supply voltage, a high gain CMOS rail to rail operational amplifier with constant transconductance was proposed on the base of the GSMC 0.18 μm CMOS process model. The input stage of the operational amplifier adopted complementary differential input pairs. To ensure constant transconductance of the input stage in whole common input range, it used three times current mirror method. The intermediate stage of the amplifier used a folded cascode structure so as to get enough gain and output swing. The class AB control circuit of output stage was good for output swing to reach rail to rail. The simulation results indicated that the dc gain reached 126 dB, and the unit gain bandwidth reached 50 MHz while the phase margin was 65° under 3.3 V power supply and 1.6 V input voltage. Because of simple structure and uncomplicated test of this operational amplifier, it could not only save cost but also shorten the design cycle.
分 类 号:TN432[电子电信—微电子学与固体电子学]
正在载入数据...
正在载入数据...
正在载入数据...
正在载入数据...
正在载入数据...
正在载入数据...
正在载入数据...
正在链接到云南高校图书馆文献保障联盟下载...
云南高校图书馆联盟文献共享服务平台 版权所有©
您的IP:3.145.184.109