一种低功耗SoC的动态时钟控制技术的应用  

An Application of Dynamic Clock Control Methodology for Low-Power SoC

作　　者：莫东杰 熊晓明[1,3] 

机构地区：[1]广东工业大学,广东广州510006 [2]佛山芯珠微电子有限公司,广东佛山528225 [3]广州国家集成电路设计产业化基地,广东广州510006

出　　处：《中国集成电路》2016年第6期19-25,37,共8页China lntegrated Circuit

摘　　要：本文设计实现了一种应用于低功耗SoC的动态时钟控制技术。该技术包括门控时钟、自适应动态频率调节和几种模式切换。并将该技术集成应用到基于open MSP430的低功耗微控制器中,仿真验证的实验结果表明,引入动态时钟控制单元的微控制器在满足工作效率与性能需求的基础上,能够有效降低功耗。A dynamic clock control methodology for low-power SoC is designed and implemented. The dynamic clock control methodology is comprised of seff-adaptive dynamic frequency regulation, clock gating and multi-mode switch. The methodology is applied to a low-power microcontroller which is based on openMSP430 microprocessor. The simulation results show that the power consumption of the microeontroller is reduced effectively without any efficiency and performance degradation

关 键 词：门控时钟 动态频率调节 低功耗 

分 类 号：TN47[电子电信—微电子学与固体电子学]