CMOS门电路输入极限参数与电源电压的关系  

Relationship Between Input Limited Parameters and Power Supply Voltage of CMOS Gates

作　　者：施朝霞[1] 贾立新[1] 

机构地区：[1]浙江工业大学信息工程学院,浙江杭州310023

出　　处：《电气电子教学学报》2016年第3期34-36,共3页Journal of Electrical and Electronic Education

基　　金：2015年浙江省课堂教学改革项目:"数字电路与数字逻辑"理论与试验相融合的课堂教学改革(kg2015056)

摘　　要：CMOS门电路是数字电路课程中的重要内容,CMOS门电路的极限参数是教学的难点和重点,课堂教学中有定性分析,无具体理论探究,导致学生阅读数据手册时无法理解输入极限参数与电源电压的关系。本文采用公式法和逐段线性近似法分析了CMOS门电路的电压传输特性曲线,并基于Cadence平台进行了仿真验证。本文对CMOS门电路极限参数的教学有一定的指导作用。CMOS gates are important part of the digital circuit, and its emphasis point is on the limited parameters. Qualitative analysis is discussed during the teaching without concrete theory. When using the date sheet, students can not understand the relationship between the input limited parameters and the supply voltage. In this paper, we analyze the voltage transfer characteristic curve using formula method and piecewise linear approximation method. The tool Cadence is used to simulate and verify the results. This paper has some guidance to the teaching of limited parameters for CMOS gate circuit.

关 键 词：CMOS门电路 极限参数 电源电压 

分 类 号：TN9[电子电信—信息与通信工程]