基于FPGA的PWM波形发生器的设计  

Design of PWM generator based on FPGA

作　　者：查国翔 马勇[1] 王聪[1] 

机构地区：[1]中国矿业大学(北京),北京100083

出　　处：《煤炭工程》2016年第8期135-137,140,共4页Coal Engineering

基　　金：国家自然科学基金项目(51077125)

摘　　要：针对煤矿井下新型无工频变压器级联式多电平变换器设计了一种基于FPGA的数字PWM发生器,解决了单个DSP芯片PWM输出路数不足的问题。介绍了PWM发生器各模块的功能和实现方式,指出其具有使用灵活、占空比可调、CPU资源占用小等优点。该PWM发生器可以使系统扩展出多路复杂的PWM输出,且每路输出都可以独立工作和编程配置。最后通过多电平变换器验证了该PWM发生器的实用性。This paper introduces the design implementation of a digital PWM generator for multilevel converter without power frequency transformer based on FPGA, to solve the inadequate PWM output lines with single DSP chip. The paper introduces the module functions and implementation model of PWM generator, and points out the advantages, including flexible application, adjustable duty ratio and low occupancy of CPU. And the generator can generate complex pulse width waveforms with minimal CPU overhead or intervention and the output of each channel can work and configuration independently. T the test of multilevel converter verifies the feasibility and validity.

关 键 词：脉宽调制发生器 现场可编程逻辑阵列 多电平变换器 

分 类 号：TD608[矿业工程—矿山机电]