基于FPGA和HI6110的多通道1553B MT设计及实现  

Design and implementation of multi-channel 1553B MT based on FPGA and HI6110

作　　者：唐建[1] 邓涵[2] 

机构地区：[1]中国兵器工业第58研究所,四川绵阳621000 [2]西南科技大学,四川绵阳621000

出　　处：《电子设计工程》2016年第16期1-4,共4页Electronic Design Engineering

基　　金：国家自然科学基金项目(61133016)

摘　　要：针对传统MIL-STD-1553B总线体积大、成本高的缺点,提出了一种基于FPGA和HI6110的多通道1553B MT设计方案。该方案将数据打包缓存在SDRAM中,外部设备通过PCI总线读取SDRAM中的总线监视数据,并通过PCI接口对模块进行配置,实现监视的启动、停止、RT地址设置等。文中首先介绍了HI6110芯片功能特点,然后详细描述了总线译码与转换、HI6110接口逻辑与访问仲裁、HI6110状态监控与总线切换、信息帧获取与缓存、内部功能寄存器等FPGA内部功能模块及实现方法。应用结果表明:该方案具有低成本、集成高、方便扩展等优点。According to the traditional MIL-STD-1553B with large volume, high cost of shortcomings, a multi-channel 1553B MT based on FPGA and HI6110 is proposed. The data is cached in SDRAM; external devices road the data in SDRAM, and configuration the module through PCI BUS, which realize monitoring start, stop, RT ID Settings, etc. This paper first introduces the HI6110 chip function characteristics, and then describes in detail BUS decoding and transformation, HI6110 interface logic and access to the arbitration,HI6110 condition monitoring and bus switching, information acquisition and caching, internal function registers such as the FPGA function module and realization method. The application shows that the design has the advantages of low cost, high integration and easy to extend, etc.

关 键 词：1553B HI6110 FPGA 总线监控器 

分 类 号：TN02[电子电信—物理电子学]