A reconfigurable passive mixer for multimode multistandard receivers in 0.18 μm CMOS  

作　　者：樊祥宁 陶健 包宽 王志功 

机构地区：[1]Institute of RF-&OE-ICs, School of Information Science and Engineering, Southeast University

出　　处：《Journal of Semiconductors》2016年第8期77-84,共8页半导体学报（英文版）

基　　金：supported by the State Key Development Program for Basic Research of China(No.2010CB327404)

摘　　要：This paper presents a reconfigurable quadrature passive mixer for multimode multistandard receivers. By using controllable transconductor and transimpedance-amplifier stages, the voltage conversion gain of the mixer is reconfigured according to the requirement of the selected communication standard Other characteristics such as noises figure, linearity and power consumption are also reconfigured consequently. The design concept is verified by implementing a quadrature passive mixer in 0.18 μm CMOS technology. On wafer measurement results show that, with the input radio frequency ranges from 700 MHz to 2.3 GHz, the mixer achieves a controllable voltage conversion gain from 4 to 22 dB with a step size of 6 dB. The measured maximum IIP3 is 8.5 dBm and the minimum noise figure is 8.0 dB. The consumed current for a single branch （I or Q） ranges from 3.1 to 5.6 mA from a 1.8 V supply voltage. The chip occupies an area of 0.71 mm2 including pads.This paper presents a reconfigurable quadrature passive mixer for multimode multistandard receivers. By using controllable transconductor and transimpedance-amplifier stages, the voltage conversion gain of the mixer is reconfigured according to the requirement of the selected communication standard Other characteristics such as noises figure, linearity and power consumption are also reconfigured consequently. The design concept is verified by implementing a quadrature passive mixer in 0.18 μm CMOS technology. On wafer measurement results show that, with the input radio frequency ranges from 700 MHz to 2.3 GHz, the mixer achieves a controllable voltage conversion gain from 4 to 22 dB with a step size of 6 dB. The measured maximum IIP3 is 8.5 dBm and the minimum noise figure is 8.0 dB. The consumed current for a single branch （I or Q） ranges from 3.1 to 5.6 mA from a 1.8 V supply voltage. The chip occupies an area of 0.71 mm2 including pads.

关 键 词：RECONFIGURABLE passive mixer MULTI-STANDARD current-commutating RECEIVERS CMOS 

分 类 号：TN851[电子电信—信息与通信工程]