基于FPGA的JPEG编码器设计  

Design of JPEG Encoder based on FPGA

作　　者：陈双燕[1] 

机构地区：[1]闽南理工学院电子与电气工程学院,福建石狮362700

出　　处：《装备制造技术》2016年第8期252-254,272,共4页Equipment Manufacturing Technology

基　　金：福建省中青年教师教育科研项目资助(编号:JB14120)

摘　　要：讨论了基于FPGA的JPEG编码器的设计原理,完成了各模块的设计,并在Model Sim平台上对代码进行了仿真,实现了图片的JPEG编码,最后在Quartus II平台上进行综合。仿真结果表明该设计方案能较好地实现图像压缩。The principle of JPEG Encoder based on FPGA was discussed in the paper. Each module of the JPEG encoder was designed,and the code was simulated in modes Sim platform,then the JPEG encoding of the image was achieved,and finally the design was compiled successfully in quartus II platform. The simulation results showed that the design was able to achieve image compression well.

关 键 词：FPGA JPEG编码器 2D-DCT 

分 类 号：TN911[电子电信—通信与信息系统]