Design of current mirror integration ROIC for snapshot mode operation  

作　　者：Hari Shanker Gupta A S Kiran Kumar M.Shojaei Baghini Subhananda Chakrabarti Sanjeev Mehta Arup Roy Chowdhury Dinesh K Sharma 

机构地区：[1]Indian Institute of Technology Bombay, Mumbai, India [2]Space Applications Centre, Jodhpur Tekra, Ahmedabad, India

出　　处：《Journal of Semiconductors》2016年第10期68-74,共7页半导体学报（英文版）

基　　金：the support extended by Shri Tapan Mishra, Director, Space Applications Centre, Ahmedabad, India;Sensor Development Area, Space Applications Centre, Ahmedabad, India for their support

摘　　要：Current mirror integration（CMI） read out integrated circuit（ROIC） topology provides a low input impedance to photo-detectors and provides large injection efficiency, large charge handling capacity and snapshot mode operation without in-pixel opamps. The ROIC described in this paper has been implemented with a modified current mirror circuit, with matched PMOS pairs for detector input stage and its biasing. The readout circuit has been designed for 30×30μm^2 pixel size, 4×4 array size, variable frame rate, 5 Me charga pixel per second（Mpps）.Experimental performance of the test chip has achieved 15 Me charge handling capacity, a high dynamic range of83 dB, 99.8% linearity and 99.96% injection efficiency. The ROIC design has been fabricated in 3.3 V 1P6 MUMC180 nm CMOS process and tested up to 5 MHz pixel rate at room and at cryogenic temperature.Current mirror integration（CMI） read out integrated circuit（ROIC） topology provides a low input impedance to photo-detectors and provides large injection efficiency, large charge handling capacity and snapshot mode operation without in-pixel opamps. The ROIC described in this paper has been implemented with a modified current mirror circuit, with matched PMOS pairs for detector input stage and its biasing. The readout circuit has been designed for 30×30μm^2 pixel size, 4×4 array size, variable frame rate, 5 Me charga pixel per second（Mpps）.Experimental performance of the test chip has achieved 15 Me charge handling capacity, a high dynamic range of83 dB, 99.8% linearity and 99.96% injection efficiency. The ROIC design has been fabricated in 3.3 V 1P6 MUMC180 nm CMOS process and tested up to 5 MHz pixel rate at room and at cryogenic temperature.

关 键 词：pixel pitch readout integrated circuit （ROIC） cryogenics SNAPSHOT FPA IR detectors 

分 类 号：TN215[电子电信—物理电子学] TN402