解耦双同步坐标系下单相锁相环技术  

Phase-locked Loop Technology for Single-phase System in Decoupled Double Synchronous Reference Frame

作　　者：文武松[1,2] 张颖超[1] 王璐[3] 詹天文[1] 龙江涛[1] WEN Wusong ZHANG Yingchao WANG Lu ZHAN Tianwen LONG Jiangtao(Department of Power Engineering, Chongqing Communication Institute, Chongqing 40003,5, China Department of Mathematics and Information Engineering, Chongqing University of Education, Chongqing 400067, China Department of Electrical Engineering, Tsinghua University, Beijing 100084, China)

机构地区：[1]重庆通信学院电力工程系,重庆市400035 [2]清华大学电机工程与应用电子技术系,北京市100084 [3]重庆第二师范学院数学与信息工程系,重庆市400067

出　　处：《电力系统自动化》2016年第20期114-120,共7页Automation of Electric Power Systems

基　　金：重庆市科委科技攻关项目(CSTC2012gg-yyjs90014);重庆市教委应用基础研究项目(KJ1501406)~~

摘　　要：针对单相并网变换器的同步问题,提出了一种基于双同步坐标系的锁相环。将单相输入信号等效为αβ静止坐标系下的正序正交虚拟分量和负序正交虚拟分量之和,通过自解耦网络消除负序基波分量的影响,无需正交信号发生器就可获得输入信号的幅值、相位和频率信息。分析了输入信号存在直流分量、谐波分量、相角突变和起始阶段相角未知等因素对锁相结果的影响,给出了相应的抑制方法。仿真和实验结果表明:在各种非理想电网状态下,该算法都能快速、准确地提取电网电压基波分量的幅值和相位,实现同步信号的检测。Phase-locked loop（PLL）based on the decoupled double synchronous reference frame（DDSRF-PLL）is proposed to deal with the synchronization of single-phase grid-connected power converters.The single-phase input signal is considered the sum of quadrature-phase components of positive and negative sequence in theαβstationary frame against using the quadrature signal generator（QSG）.A self-decoupling network is incorporated to detect the fundamental component of the input signal.By analyzing the performance of proposed PLL when the input signal contains DC components,high-frequency harmonics,frequency variation and phase-angle jumps,restraining methods are put forward.Simulations together with a series of experiments are conducted to show that the proposed PLL can extract the amplitude and phase of fundamental components quickly and accurately under various non-ideal grid conditions.

关 键 词：单相锁相环 解耦双同步参考坐标系 直流分量 相角突变 频率自适应 

分 类 号：TM46[电气工程—电器]