高动态环境下三阶锁相环参数设计及性能仿真  

Design and Simulation of Third Order Phase-ocked Loop in High-dynamic Applications

作　　者：田甜[1] 崔超[1] 程立明[1] 

机构地区：[1]北京控制工程研究所,北京100190

出　　处：《空间电子技术》2016年第4期57-60,共4页Space Electronic Technology

摘　　要：文章分析了高动态环境下三阶锁相环参数设计方法。从环路带宽、环路稳定性方面分析比较了Meyr和Kaplan模拟环路的参数设计方法。之后分析比较数字环路的参数设计方法,包括Meyr设计方法的数字实现及Jaffe-Rechtin滤波器。最后,基于数字环路参数设计方法分析,通过性能仿真,表明在不同的输入信号动态及信噪比条件下,可以通过优化环路带宽设计参数,以减小失锁概率及跟踪误差。文章结论为高动态环境下三阶锁相环参数优化设计提供参考。In order to satisfy the requirement of the high-dynamic applications,the design method of third order phaselocked loop is analyzed in this paper. Firstly,Meyr and Kaplan methods for analog loop are compared,including loop bandwidth and stability. Secondly,Meyr and Jaffe-Rechtin methods are compared and analyzed for digital loop. Finally,based on digital loop design method,the simulation results show that loop bandwidth parameters optimized design can reduce the lossof-lock probability and tracking error under different dynamic condition and SNR. The conclusion in this paper is useful for the design of third order phase-locked loop in high-dynamic applications.

关 键 词：三阶锁相环 高动态 跟踪性能 参数设计 

分 类 号：TP273.1[自动化与计算机技术—检测技术与自动化装置]