CMOS中频数字接收机片上系统的设计与实现  

Design and Implementation of a System On-Chip for CMOS Intermediate Frequency Digital Receiver

作　　者：邓军[1] 张颜林[1] 刘林涛[1] 黄旭[1] 陶毅[1] 

机构地区：[1]中国电子科技集团公司第二十四研究所,重庆400060

出　　处：《微电子学》2016年第5期581-584,共4页Microelectronics

摘　　要：随着CMOS工艺技术的进步,集成化、小型化成为电子器件的发展趋势。提出了一种基于CMOS工艺的中频数字接收机片上系统(SoC)方案,实现了将射频接收前端、A/D转换器(ADC)、数字下变频器(DDC)和数字基带处理器集成在一个芯片上。该芯片采用0.18μm CMOS工艺,芯片面积为(7×8)mm^2。在0.5~4GHz范围内完成了芯片测试。测试结果表明,SoC芯片射频接收前端的镜像抑制比为46.3dB,系统噪声为9.4dB,增益控制范围为54.4dB,满足系统的指标要求。该芯片在小型化、集成化、高可靠性电子系统中有广泛的应用前景。With the development of CMOS technology,the integration and miniaturization have become the development trends of electronic devices.A scheme of system on-chip（SoC）for intermediate frequency digital receiver based on CMOS process was proposed,which integrated together with a RF receiving front-end,an A/D converter,a digital down-converter and a digital base-band processer in a chip.The proposed chip was implemented in a 0.18μm CMOS process,occupying an area of（7×8）mm^2.The test of chip had been completed within the RF signal range of 0.5~4GHz.The test results showed that the RF receiving front-end of the SoC chip had an image rejection rate of 46.3dB,a system noise of 9.4dB,again control range of 54.4dB.The chip was qualified for the system in terms of specification.The chip has broad application prospects in the miniaturized,integrated,high reliable electronic systems.

关 键 词：中频数字接收机 射频接收前端 SOC A/D转换器 

分 类 号：TN432[电子电信—微电子学与固体电子学] TN851