FPGA局部重配置技术的实现及应用  

Implementation and Application of FPGA Partial Reconfiguration Technology

作　　者：韩炼冰[1] 段俊红[1] 王松[1] 房利国[1] 刘蕴[1] 

机构地区：[1]中国电子科技集团公司第三十研究所,四川成都610041

出　　处：《通信技术》2016年第12期1728-1732,共5页Communications Technology

摘　　要：局部重配置能够在现场可编程门阵列(FPGA)运行过程中动态修改重配置区域,而不影响其他非重配置区域的正常运行。因此,采用局部重配置技术设计的系统,往往具有良好的灵活性和适应性。于是,在详细描述FPGA局部重配置的实现方法的基础上,提出了一种避免所有模块联合编译的FPGA设计方法。最终,分别在virtex5和Artix7开发板上对该设计方法进行验证,证明了所提方法的可行性。Partial reconfiguration can dynamically modify reconfiguration region in operating process of FPGA, without any effect on the normal operation of other non-reconfiguration region. For this reason, the system with the design of partial reconfiguration technology often has fairly good flexibility and adaptability. Thus based on the detailed description of implementation method of FPGA partial reconfiguration, the FPGA design method capable of avoiding all modules in combined compiling is proposed. Finally, the actual verification of the design method on the Virtex5 and Artix7 development boards is done, and this verification indicates the feasibility and applicability of the proposed method.

关 键 词：局部重配置 FPGA 编译 动态配置 

分 类 号：TP302[自动化与计算机技术—计算机系统结构]