芯片级LED封装光源结构散热性能的数值模拟  

Structure of Chip Scale Package for LED Light Source and Its Thermal Performance Analysis Based on Numerical Simulation

作　　者：刘超[1] 傅仁利[1] 顾席光[1] 周鸣 田扬 蔡君德 

机构地区：[1]南京航空航天大学材料科学与技术学院,江苏南京210016 [2]南京汉德森科技股份有限公司,江苏南京211100

出　　处：《激光与光电子学进展》2016年第12期234-243,共10页Laser & Optoelectronics Progress

基　　金：江苏高校优势学科建设工程;江苏省普通高校研究生科研创新计划(SJLX15_0127);中央高校基本科研业务费专项

摘　　要：采用计算机数值模拟的方法研究了芯片级封装(CSP)LED的散热特性,并进行了实验验证。利用有限体积方法模拟计算了在直径为25mm、厚度为1mm的铝基板上采用芯片级封装方式封装LED模组的散热特性,模拟计算表明芯片的结温与封装芯片功率和芯片间距密切相关,要实现芯片工作温度低于120℃的技术要求,芯片的间距和芯片功率都要考虑。封装芯片间距为3.5mm时,只有单颗功率为0.5 W的芯片可以满足封装要求。而随着封装芯片间距增大,适用的芯片功率逐渐提高,当封装芯片间距为7.25mm时,功率小于3 W的CSP芯片都适用于LED封装。输入功率一定时,模组的热阻随着封装密度的增加而减小,当封装密度为15.13%时,模组热阻可以降至2.26K/W。芯片级封装的LED模组热阻低,是下一代LED封装发展方向。In this paper, the thermal performance of chip scale packaged （CSP） LED was studied by numerical simulation and demonstrated by experiments. Heat dissipation characteristics of CSP LED modules which were packaged upon an aluminum substrate with a diameter of 25 mm and a thickness of 1 mm were computed by finite volume method, and the study showed that the chip junction temperature was closely related to chip power and distance between chips. To achieve technical requirement of junction temperature below 120 ℃, the distance and chip power both need considering. When the distance was 3.5 mm, only the single chip power of 0.5 W could meet the requirement. As the distance increased, the chip power could rise gradually. When the distance was 7.25 mm, chips whose power was less than 3 W could be applicable to the packaging. While the total input power was certain, thermal resistance of module decreased with the increased of packing density. When the packing density was 15.13%, module thermal resistance dropped to 2.26 K/W. Chip scale package is development direction of the next generation of LED packaging because of the lower thermal resistance.

关 键 词：光学器件 散热 数值模拟 LED 芯片级封装 封装密度 

分 类 号：TN312.8[电子电信—物理电子学] TN383.1