一种SATA Ⅲ的Sigma-Delta小数分频扩频时钟产生器设计  被引量:1

Design of a SATA Ⅲ SSCG Based on Sigma-Delta Fraction-N Synthesizer

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作  者:龙强[1,2] 田泽[1,2] 邵刚[1,2] 王晋[1,2] LONG Qiang TIAN Ze SHAO Gang WANG Jin(Aeronautical Computing Technique Research Institute of AVIC, Xi' an Shaanxi 710068, China Aeronautical Science and Technique Key Laboratory of Integrate Circuit and Micro-system Design, Xi' an Shaanxi 710068, China)

机构地区:[1]中航工业西安航空计算技术研究所,陕西西安710068 [2]集成电路与微系统设计航空科技重点实验室,陕西西安710068

出  处:《无线电工程》2017年第1期62-66,共5页Radio Engineering

基  金:总装备部预研基金资助项目(9140A08010712HK6101)

摘  要:整数分频扩频时钟产生器具有较大的频率分辨率,不能满足SATA Ⅲ的要求,针对该问题提出了一种SATA Ⅲ的6 GHz Sigma-Delta小数分频扩频时钟产生器的设计。扩频时钟产生器基于65 nm CMOS工艺,采用了数字MASH SigmaDelta频率调制技术和一个产生33 k Hz的三角波产生器,输出频率达到6 GHz,向下扩频达到5 000 ppm。测试结果表明,在1.2 V的电源电压下,功耗为48 m W,非扩频时钟的峰峰抖动为8 ps,电磁干扰降低了15 d B。Sigma-Delta小数分频扩频时钟产生器克服了整数分频器扩频时钟产生器的缺点,较好地满足了SATA Ⅲ的要求。Due to larger frequency resolution, integer frequency division spread spectrum clock generating appliances can not meet the requirements of SATAⅢ.In this paper, a 6 GHz Sigma-Delta Fraction-N spread spectrum clock generator(SSCG) for serial AT Attachment Generation 3 (SATA Ⅲ) is presented. Employing digital MASH Sigma-Delta modulator and 33 kHz triangular profile address generator,the SSCG achieves an output clock of 6 GHz which has an 5 000 ppm down spread spectrum amount.The SSCG i~ designed based on 65 nm CMOS process.The power dissipation is 48 mW under a 1.2 V supply.The peak-to-peak jitter of non spread spectrum clock is 8 ps.And the EMI reduction is 15 dB with normaI frequency spread modulation from 6 GHz to 5.97 GHz.The Sigma- Delta Fraction-N spread spectrum clock generator overcomes the disadvantages of integer frequency division spread spectrum clock generator,satisfying the requirement of SATAⅢ.

关 键 词:扩频时钟产生器 SIGMA-DELTA SATAⅢ 小数分频 

分 类 号:TN792[电子电信—电路与系统]

 

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