IEPE加速度计电路噪声分析  

Analysis of Circuit Noise in Integral Electronics Piezoelectric Accelerometer

作　　者：杨哲[1] 曹丽芳[1] 王玉田[1] 侯培国[1] 李泓锦[1] 程朋飞 潘钊[1] 

机构地区：[1]燕山大学电气工程学院,秦皇岛066004

出　　处：《振动．测试与诊断》2016年第5期948-953,共6页Journal of Vibration,Measurement & Diagnosis

基　　金：国家自然科学基金资助项目(61471312;61403333);河北省青年科学基金资助项目(F2015203072)

摘　　要：研究压电集成电路加速度计的主要噪声源,利用En-In噪声模型将内部噪声源等效输入端,实现了输入噪声和输入信号的直接对比,能容易得到噪声对信号的影响。将Y-Δ变换原理引入T型网络噪声分析,降低噪声分析难度。通过对电路噪声的分析,在宽频范围内推导出可用于计算IEPE加速度计电路本底噪声的公式。将理论计算值与PSpice软件噪声分析所得值进行了对比,证明二者具有良好的相关性,同时得出了各噪声源在输入端对总噪声的贡献,提出了在不同频段内降低总噪声的方法,为IEPE加速度计电路的低噪声设计、参数选择和性能优化提供了理论依据。实验样机的实际值与理论值的对比结果表明,此法对于IEPE加速度计电路低噪声设计具有应用价值。This paper studies the main source of noise in an integral electronics piezoelectric (IEPE) accelerometer circuit. When the noise model allows the internal noise to be converted into the input source, the noise's effect on the signals can be easily analyzed by the direct comparison between the input noise and input signal. Then, the noise analysis was simplified by introducing the transformation principle into the T-network noise analysis. The circuit background noise in the IEPE accelerometer within the broadband was derived based on the former analysis, which was verified by the PSpice software. Meanwhile, the method presented different contributions that various noise sources made on the total noise at the input and put forward a method of total noise reduction at different frequencies. These studies provide a theoretical basis for IEPE accelerometer circuit design, parameter selection and performance optimization in low noise. The comparison of the actual value with the theoretical value of an experimental prototype shows the efficacy of this method in reducing the IEPE accelerometer circuit noise. © 2016, Editorial Department of JVMD. All right reserved.

关 键 词：IEPE加速度计 电路噪声 电荷放大器 PSPICE软件 

分 类 号：TH73[机械工程—仪器科学与技术] TH823[机械工程—精密仪器及机械]