基于修正优化归并排序的MMC电容均压策略  

A Capacitor Voltage Balancing Strategy for MMC Based on Optimized Merge Sort

作　　者：苟锐锋 赵方舟[2] 肖国春[2] 涂小刚 

机构地区：[1]西安西电电力系统有限公司,陕西省西安市710065 [2]西安交通大学电气工程学院,陕西省西安市710049

出　　处：《中国电机工程学报》2017年第1期251-260,共10页Proceedings of the CSEE

基　　金：国家重点基础研究发展计划项目(973计划)(2015CB251001)~~

摘　　要：多电平变换器(modular multilevel converter,MMC)传统子模块电容均压策略中,排序算法的运算量随子模块数目呈指数倍增长。子模块数目很多时,硬件设计难度大、成本高。为此,以减小排序运算量为目的,提出了一种基于归并排序的改进电容均压策略。同时,依据理想情况下MMC的电容电压规律,优化归并排序,使计算量进一步减小,并分析了非理想条件时电容电压的变化情况,提出了修正优化归并算法,保证高效的同时,显著改善了均压效果。最后,采用DSP控制器TMS320F28335比较排序算法的执行时间,结果表明优化后运算量显著减小。通过PSCAD/EMTDC搭建451电平MMC仿真模型,验证了优化归并排序均压策略及其修正算法的有效性。In the conventional capacitor voltage balancing control of modular multilevel converters （MMC）, calculation quantity increases exponentially with the number of sub-modules （SMs）. In the application with a great many SMs, it leads great difficulty and high cost to hardware design. To solve the problem, this paper proposed an improved capacitor voltage balancing strategy based on the merge sort to reduce computation quantity evidently. Meanwhile, according to the capacitor voltage variation rule of the nearest level modulation （NLM） method in the ideal condition, the paper optimized the merge sort to further decrease calculation quantity, analyzed variations of capacitor voltages in the non-ideal condition, and proposed a corrected optimized algorithm. In the end, the paper used the DSP controller TMS320F28335 to compare execution time of the sorting algorithms, and results of the optimized method indicate significant reduction of computation quantity. Using PSCAD/EMTDC to establish a 401-level MMC simulation model, validity of the optimized merge sort and the corrected algorithm are verified.

关 键 词：模块化多电平换流器 电容均压 运算量 排序算法 归并排序 插入排序 

分 类 号：TM721[电气工程—电力系统及自动化]