基于ESL的华睿2号SoC系统级架构设计  

Architecture Design for Huarui-2 SoC Based on ESL

作　　者：刘静[1] 周海斌[1] 

机构地区：[1]南京电子技术研究所,江苏南京210039

出　　处：《南京师范大学学报（工程技术版）》2016年第4期69-77,共9页Journal of Nanjing Normal University(Engineering and Technology Edition)

基　　金：核高基重大专项课题(2012ZX01034-001-002)

摘　　要：华睿2号是我国自主研发的一款8核微处理器,基于CMOS 40nm工艺设计,片内集成8核DSP、AXI总线以及PCIE/DDR3等多种高速接口的大规模片上系统芯片(So C).鉴于华睿2号设计复杂,需使用电子系统级(ESL)解决方案,确定So C级架构.ESL设计方法学已被越来越多的复杂So C设计所采纳,利用可裁剪的TLM建模方法快速搭建系统,进行系统级验证,探索不同架构设计对系统性能的影响,从而寻找最优方案.本文利用Synopsys ESL解决方案,创建So C不同的架构,并在创建的架构上运行雷达信号处理典型应用,分析处理时间、总线压力等架构性能,通过优劣对比最终确定最优架构.Huarui - 2 is a 8 cores high-performance embedded processor （based on cmos 40nm） developed by NRIET. Huarui-2 is constructed by 8-core DSP,AXI bus, PCIE/DDR3 and otlier high-sjDeed interface. Given the SoC complexi-ty, we need to use the electronic system level（ESL） solution, a nd determine SoC-level architecture. ESL metliodology has been adopted by more and more complex SoC designs. Designers can build and verify their SoC platforms rapidly, do ar-chitecture exploration to know the system performance witli the generated Virtual Prototype witling metliod. Via Synopsys ESL solution, we create diferent architectures and run typical radar signal proctions based on the architectures. By analyzing the processing time and bus pressure, we ultimately determine chitecture of Huarui-2.

关 键 词：华睿2号 片上系统芯片 电子系统级 架构设计 

分 类 号：TP391.9[自动化与计算机技术—计算机应用技术]