多核DSP和FPGA之间的高速SRIO通信  

High-speed Communication Between Multicore DSP and FGPA Based on SRIO

作　　者：汪安民 韩道文[2] 徐焱[3] 

机构地区：[1]同方电子科技有限公司研究所,九江332009 [2]电子工程学院 [3]哈尔滨工业大学

出　　处：《单片机与嵌入式系统应用》2017年第2期4-6,22,共4页Microcontrollers & Embedded Systems

摘　　要：在高速采样系统中,大量数据需要实时传输到处理器。尤其是系统中存在多个处理器协同工作,就需要高速的总线来交换数据。SRIO总线由于存在连线少、传输速度高等优点,使用较为广泛。本文介绍了多核DSP和FPGA之间使用SRIO进行数据交换的软硬件设计方法,在不同数据需求下,介绍了FPGA将数据直接传输到DSP的DDR3、片内RAM或者多核的共享RAM中。本文研制了硬件系统,给出了各种方式的软件操作方法和实际硬件平台验证,SRIO传输速率达到4Gbps。High speed data communication between the different processors is needed in the high sampling system. The SRIO bus is used widely because it＇s high efficiency and low latency. In this paper, the design method of SRIO bus between FPGA and DSP is studied. The data translation is realized from FPGA to DDR3, shared RAM or private RAM of DSP. In this paper, the hardware system is developed, and the operation method of the software and the verification of the actual hardware platform are given. The result of data throughput is up to 4 Gbps by the SRIO bus in the real system.

关 键 词：多核处理器 SRIO 共享RAM 

分 类 号：TP332[自动化与计算机技术—计算机系统结构]