基于SABL的防御差分功耗分析移位寄存器设计  

Design of resistant differential power analysis shift register based on SABL

作　　者：钱浩宇[1] 汪鹏君[1] 丁代鲁 张跃军[1] 

机构地区：[1]宁波大学电路与系统研究所,浙江宁波315211

出　　处：《电子技术应用》2017年第2期40-43,共4页Application of Electronic Technique

基　　金：国家自然科学基金(61274132;61474068);浙江省自然科学基金(LQ14F040001)

摘　　要：通过对传统移位寄存器原理和灵敏放大型逻辑(Sense Amplifier Based Logic,SABL)电路的研究,提出一种能够防御差分功耗分析的移位寄存器设计方案。该方案首先采用主从触发的方式,设计基于SABL电路的清零置位D触发器;然后利用该触发器与SABL逻辑门实现多位移位寄存器电路。Spectre仿真验证表明,所设计的移位寄存器逻辑功能正确,在多种PVT组合下NED均低于2.66%、NSD均低于0.63%,具有显著的防御差分功耗分析性能。By researching on the principle of traditional shift register and Sense Amplifier Based Logic （SABL） circuit, a scheme of resistant differential power analysis shift register is proposed. Firstly, the proposed shift register circuit implements the clear set D flip-flop with the master-slave trigger mode based on SABL circuit. The D flip-flop and SABL logic gates are integrated to design a multi-bits shift register circuit. Spectre simulation results show that the circuit of shift register has correct logic function. Under testing of PVT combinations, NED and NSD of are lower than 2.66% and 0.63%, respectively. It is shows that the proposed shift register has significant performance in resistant differential power analysis.

关 键 词：SABL 防御差分功耗分析 移位寄存器 信息安全 

分 类 号：TN918.4[电子电信—通信与信息系统]