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作 者:Xing HUANG Wenzhong GUO Genggeng LIU Guolong CHEN
机构地区:[1]College of Mathematics and Computer Sciences, Fuzhou University, Fuzhou 350116, China [2]Key Laboratory of Network Computing and Intelligent Information Processing (Fujian Province), Fuzhou University, Fuzhou 350116, China
出 处:《Science China(Information Sciences)》2017年第1期207-209,共3页中国科学(信息科学)(英文版)
基 金:supported in part by National Basic Research Program of China (Grant No. 2011CB808000);National Natural Science Foundation of China (Grants Nos. 11271002, 11501114);Fujian Natural Science Funds for Distinguished Young Scholar (Grant No. 2014J06017);Program for New Century Excellent Talents in Fujian Province (Grant No. JA13021)
摘 要:Dear editor, Rectilinear Steiner minimal tree (RSMT) has been widely used in several modern very large scale integration (VLSI) circuit design phases. Because of its importance, it has been fully studied in the past decades. In addition, the density of modern VLSI chips has increased significantly. In today's VLSI designs, there are increasingly more obsta- cles, such as IP blocks and pre-routed nets, these obstacles cannot be run through during the rout- ing process, and thus the obstacle-avoiding RSMT (OARSMT) construction problem has received in- creasing attention in recent years.Dear editor, Rectilinear Steiner minimal tree (RSMT) has been widely used in several modern very large scale integration (VLSI) circuit design phases. Because of its importance, it has been fully studied in the past decades. In addition, the density of modern VLSI chips has increased significantly. In today's VLSI designs, there are increasingly more obsta- cles, such as IP blocks and pre-routed nets, these obstacles cannot be run through during the rout- ing process, and thus the obstacle-avoiding RSMT (OARSMT) construction problem has received in- creasing attention in recent years.
关 键 词:VLSI MLXR multi-layer obstacle-avoiding X-architecture Steiner tree construction for VLSI routing tree
分 类 号:TN47[电子电信—微电子学与固体电子学] TP332[自动化与计算机技术—计算机系统结构]
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