多核浮点非线性运算协处理器的设计与实现  

Design and Implementation of Multicore Floating-point Nonlinear Operation Coprocessor

作　　者：马小霞[1] 李文新[1] 金田[1] 赵彦荣[1] 夏加高 

机构地区：[1]兰州空间技术物理研究所,兰州730000

出　　处：《计算机工程》2017年第2期131-136,共6页Computer Engineering

基　　金：载人航天重大工程专项

摘　　要：在载人航天飞船的终端仪器仪表设计中,处理算法中的浮点非线性运算常采用库函数实现,但软件实现非线性函数执行速度慢,限制了浮点算法的应用。为此,针对航天领域处理器不支持非线性函数运算的情况以及浮点算法执行速度慢的问题,提出一种多核并行执行浮点非线性运算处理方法,利用现场可编程门阵列内部并行架构带来的低延迟特性来提高非线性浮点运算的速度。仿真实验结果表明,该方法可计算有限定义域范围内的浮点非线性函数,有效提高浮点运算的执行速度。When designing terminal instrument for manned spacecraft,the floating-point nonlinear operation of processing algorithms is achieved by library function.But the speed is always very slow,when software is used to implement nonlinear operations,which limits the application of many floating-point algorithms.A multicore parallel method based on FPGA is presented for the purpose of processing nonlinear functions and low run speed.It makes full use of the advantage which FPGA s parallel internal architecture to improve nonlinear operation speed.Simulation experimental results that the method can calculate nonlinear functions within the scope of limited definition domain and improve floating-point operation speed effectively.

关 键 词：浮点数 多核运算协处理器 非线性函数 CORDIC算法 现场可编程门阵列 并行 

分 类 号：TP332[自动化与计算机技术—计算机系统结构]