基于单稳态定时偏差的高识别性PUF电路设计  

Design of high recognition PUF circuit based on monostable timing deviation

作　　者：钱浩宇[1] 汪鹏君[1] 张跃军[1] 李刚[1] QIAN Haoyu WANG Pengjun ZHANG Yuejun LI Gang(Institute of Circuits and System, Ningbo University, Ningbo 315211, Zhejiang Province, China)

机构地区：[1]宁波大学电路与系统研究所,浙江宁波315211

出　　处：《浙江大学学报（理学版）》2017年第1期64-69,共6页Journal of Zhejiang University（Science Edition）

基　　金：国家自然科学基金资助项目(61474068;61274132);浙江省自然科学基金资助项目(LQ14F040001);浙江省教育厅项目(Y201430798);宁波市自然科学基金资助项目(2015A610107)

摘　　要：通过对单稳态电路定时偏差和物理不可克隆函数(physical unclonable functions,PUF)电路的研究,提出了一种基于单稳态定时偏差的高识别性PUF电路设计方案.首先,分析单稳态定时电路的自我标识物理特性,提出长定时单稳态电路设计方法;然后,利用该单稳态电路产生的定时偏差信号以及激励信号控制数据选择器选择2个定时偏差信号,结合仲裁器判决唯一的、不可克隆的输出响应.采用TSMC 65nm CMOS工艺,在不同环境下对设计的PUF电路进行Monte Carlo仿真,分析其识别性、可靠性等特性.实验结果显示,所设计的PUF电路识别性可达99.82%,且误码率为2.7%.Based on the study the timing deviation of monostable circuit and physical unclonable function （PUF） circuit, a high recognition PUF circuit scheme was proposed. Firstly, by analyzing the self identity physical properties of monostable circuit, a long-range timing design method was presented. The monostable circuit is then used to generate a timing deviation signal, and two timing deviation signals were chosen by multiplexer through challenge signal. The arbiter circuit determined high recognition and unclonable response. The proposed PUF circuit was simulated under TSMC 65 nm CMOS technology by Monte Carlo test. With the Monte Carlo simulation results, its u- niqueness and reliability under different circumstances were analyzed. Experimental results show that the recognition rate of PUF circuit is 99.82% with bit error rate of 2.7%.

关 键 词：PUF电路 单稳态定时电路 高识别性 信息安全 

分 类 号：TP331[自动化与计算机技术—计算机系统结构]