基于交点队列型Crossbar的多层AXI总线设计  

Design of a multi-layer AXI bus based on the crosspiont-queued crossbar

作　　者：胡春林[1,2] 王镇[2] 王申卓 汪健[2] 徐大诚[1] 

机构地区：[1]苏州大学电子信息学院,江苏苏州215006 [2]中国兵器工业集团北方电子研究院有限公司微电子部,江苏苏州215163

出　　处：《电子技术应用》2017年第3期29-32,共4页Application of Electronic Technique

摘　　要：AXI总线内部传统的核间通信结构对处理器核之间的通信存在多方面的限制,已难以满足多核SoC(System on Chip)日益发展的性能需求。提出以交点队列(Crosspiont-Queued,CQ)型Crossbar代替传统的核间通信结构,设计一种多层AXI总线。通过Simulink工具对交点队列型核间通信结构进行建模与仿真,确定其交点缓存的最佳深度。并结合VCS仿真工具对所设计的RTL代码进行了全方面的仿真,结果表明,所设计的通信架构能够完整地实现读写功能。With in AXI Bus ,there are many restrictions for the inter-core communication which lead to AXI Bus seem hardly to meet the growing performance requirement of multi-processor System-on-Chip.This paper presents a multi-layer AXI Bus which introduces crosspiont-queued structure to connect cores instead of traditional connection structure.Through modeling and simulation analysis by Simulink,the most optimum buffer lengths of crosspiont-queued can be confirmed. After times all round simulating for code of this design by VCS ,resuh shows that the design can realize total function which an on-chip communication architecture should possess.

关 键 词：AXI总线 多核SoC 交点队列 多层总线 

分 类 号：TP302[自动化与计算机技术—计算机系统结构]