优化芯片面积的标准单元库改进  

Improvement of standard cell library for optimizing chip area

作　　者：王仁平[1] 魏榕山[1] 高扬标 江浩[1] WANG Renping WEI Rongshan GAO Yangbiao JIANG Hao(College of Physics and Information Engineering, Fuzhou University, Fuzhou, Fujian 350116, China)

机构地区：[1]福州大学物理与信息工程学院,福建福州350116

出　　处：《福州大学学报（自然科学版）》2017年第1期98-101,共4页Journal of Fuzhou University(Natural Science Edition)

基　　金：国家自然科学基金资助项目(61404030);福建省教育厅科技资助项目(JA13039)

摘　　要：以深亚微CSMC M5324工艺对标准单元建库流程进行系统研究,确立一个性能好、面积相对较小的C^2MOS结构D寄存器,对其进行原理图设计优化、棍棒图绘制、版图设计验证、单元表征和LEF文件提取等操作.LED驱动控制芯片使用自行改进的C^2MOS结构D寄存器,与使用CSMC提供的标准D寄存器相比,整个芯片Core面积减少8.1%,进行MPW验证,工作正常,性能达到要求.This paper makes systematical research on establishing the standard cell library process based on the deep submicron CSMC M5324 process. A good performance D register is adopted, relatively smaller size of the C2MOS structure D register and makes its schematic design optimization, drawing sticks diagram, layout design and verification, cell characterization and lef file extraction and so on. The LED driver control chip makes use of self improved C2MOS structure D register, compared to adopting the standard D register which is provided by CSMC, the whole chip core area is decreased by 8.1%. By the MPW verifitation, the chip is worked normally and met the performance requirements.

关 键 词：棍棒图 标准单元 单元表征 Milkyway参考库 

分 类 号：TN492[电子电信—微电子学与固体电子学]