一种低功耗高效率的双向AXI2AHB总线桥设计与实现  

Design and Verification of a Low Power and High Efficiency AXI2AHB Bidirectional Bridge

作　　者：焦龙涛 高欣[2] JIAO Long-tao GAO Xin(The 54th Research Institute of CETC ,Shijiazhuang Hebei 050081 Unit 63916, PLA, Beijing 100089, China)

机构地区：[1]中国电子科技集团公司第五十四研究所 [2]中国人民解放军63916部队

出　　处：《无线电通信技术》2017年第2期78-82,共5页Radio Communications Technology

基　　金：国家部委基金资助项目

摘　　要：为了方便不同IP(intellectual property)核之间通信,针对广泛使用的AXI与AHB这2种总线,提出了一种低功耗高效率的双向AXI2AHB总线桥的设计与实现方法。介绍了这2种总线协议的特点,阐述了AXI2AHB总线桥的设计结构和实现方法,并采用多事务处理、写数据预读策略以及低功耗优化技术。使用Verilog语言在modelsim工具下进行了验证,仿真结果表明该总线桥能较大提高So C芯片的系统带宽利用率并降低芯片产生的功耗。To make a convenient connection among different IP（ intellectual property） cores,a design of Low Power High Efficiency bidirectional bus bridgeis proposed in view of AXI and AHB buses. Firstly,the characteristic of the two buses is described.And then a conclusion of the designing and implementing technique of the bidirectional bus bridge is reached accordingly,in combination of multi-transaction processing,write data prefetching strategy,and low powertechnology. Finally validation is implemented utilizing Verilog language under the environment of modelsim. Simulation results show that the bus bridge could greatly improve the system bandwidth utilization and reduce the power of the So C chip.

关 键 词：AXI总线 AHB总线 总线桥 双向 低功耗 

分 类 号：TP336[自动化与计算机技术—计算机系统结构]