Security Enhancement of Arbiter-Based Physical Unclonable Function on FPGA  被引量:1

Security Enhancement of Arbiter-Based Physical Unclonable Function on FPGA

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作  者:WANG Jun LIU Shubo XIONG Xingxing LIANG Cai 

机构地区:[1]Key Laboratory of Aerospace Information Security and Trusted Computing Ministry of Education, Wuhan University, Wuhan 430072, Hubei, China [2]School of Computer, Wuhan University, Wuhan 430072,Hubei, China

出  处:《Wuhan University Journal of Natural Sciences》2017年第2期127-133,共7页武汉大学学报(自然科学英文版)

基  金:Supported by the National Natural Science Foundation of China(41371402);the Fundamental Research Funds for the Central Universities(2015211020201)

摘  要:In order to reduce physical unclonable fixnction (PUF) response instability and imbalance caused by the metastability and the bias of arbiter, this paper uses an improved balanced D flip-plop (DFF) based on the unbalanced DFF to reduce the bias in response output and enhances the security of PUF by adopting two balanced DFFs in series. The experimental results show that two cascaded balanced DFFs improve the stability of the DFF, and the output of two balanced DFFs is more reliable. The entropy of output is fixed at 98.7%.In order to reduce physical unclonable fixnction (PUF) response instability and imbalance caused by the metastability and the bias of arbiter, this paper uses an improved balanced D flip-plop (DFF) based on the unbalanced DFF to reduce the bias in response output and enhances the security of PUF by adopting two balanced DFFs in series. The experimental results show that two cascaded balanced DFFs improve the stability of the DFF, and the output of two balanced DFFs is more reliable. The entropy of output is fixed at 98.7%.

关 键 词:physical unclonable function METASTABILITY balanced D flip-flop field programmable gate arrays (FPGA) security 

分 类 号:TP309[自动化与计算机技术—计算机系统结构]

 

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