一种10bit 200MS/s分段式电流舵DAC设计  

Design of a 10bit 200MS/s segmented current-steering DAC

作　　者：王帅[1] 黄海生[1] 李鑫[1] 尹强[1] 李东亚[1] 

机构地区：[1]西安邮电大学电子工程学院,陕西西安710121

出　　处：《电子技术应用》2017年第4期55-57,61,共4页Application of Electronic Technique

基　　金：国家科技重大专项课题(2013ZX03001010)

摘　　要：基于TSMC 0.18μm CMOS工艺,设计一种10 bit采样率为200 MS/s的DAC(数模转换器)。为了提高DAC的整体性能,电路主体采用了分段式电流舵结构,高6位为温度计码,低4位为二进制码。电流源开关单元采用了cascode结构(共源共栅)和差分输出结构。另外,采用了一种低交叉点开关驱动电路来提高DAC的动态性能。电路仿真结果显示,在1.8 V电源供电下,DAC的微分非线性误差(DNL)和积分非线性误差(INL)的最大值为0.05 LSB和0.2 LSB。在输出信号频率为0.976 MHz时,DAC的无杂动态范围(SFDR)为81.53 dB。Based on TSMC 0.18 μm CMOS process, an 10 bit 200 MS/s DAC（ digital to analog converter） was designed. In order to improve the whole performance of the DAC, circuit mainly using segmented current steering architecture, where the upper 6 bits were thermometer codes, and the lower 4 bits were binary codes. A cascode and differential output structure was adopted in the current source and switching unit. In order to improve the dynamic performance of the DAC, a low cross-point switch drive circuit was used in this paper. Operating at 1.8V power supply, simulation result showed that the DAC had an INL and DNL of 0.05 LSB and 0.2 LSB respectively and SFDR up to 81.53 dB for 0.976 MHz output signal frequency.

关 键 词：电流舵 cascode结构 低交叉点驱动电路 

分 类 号：TN432[电子电信—微电子学与固体电子学]