基于ADF4350锁相频率合成器的设计与实现  

Design and implementation for the phase-locked frequency synthesizer based on ADF4350

作　　者：商锋[1] 刘丹[1] 

机构地区：[1]西安邮电大学电子工程学院,陕西西安710121

出　　处：《西安邮电大学学报》2017年第2期73-76,共4页Journal of Xi’an University of Posts and Telecommunications

摘　　要：为了在天线接收机中产生精准的本振频率,以10 MHz的晶振作为ADF4350锁相频率合成器的输入信号,并以单片机控制ADF4350的本振作为输出信号。运用仿真软件ADF435X,计算得出ADF4350芯片输出2.422GHz时的6位寄存器的数值,并使用ADIsimPLL3.41软件仿真得出ADF4350的外围环路滤波器的电阻值、电容值和相位噪声值。硬件电路测试结果表明,ADF4350输出频率为2.422GHz,相位噪声可以达到低相噪模式。In order to produce accurate local frequency in the receiver antenna, 10 MHz crystal is used as input signal for ADF4350, and the local oscillator frequency of 2. 422 GHz is used as chip output controlled by single chip microcomputer ADF4350. The simulation software ADF435X is used to calculate the value of the six bit register when the ADF4350 chip outputs 2.422 GHz, and ADIsimPLL3.41 software is used to simulate the resistance, capacitance and phase noise of the ADF4350 loop filter. The hardware circuit testing and debugging show that output frequency is 2. 422 GHz and therefore phase noise simulation results can be achieved.

关 键 词：ADF4350 锁相 环路滤波器 相位噪声 

分 类 号：TN742[电子电信—电路与系统]