基于抗静电设计的集成电路可靠性技术研究  

Research of Reliability Technology Based on Antistatic Design

作　　者：杨菊瑾[1] 

机构地区：[1]中国电子科技集团公司第四十七研究所,沈阳110032

出　　处：《微处理机》2017年第2期22-25,共4页Microprocessors

摘　　要：集成电路工艺发展到深亚微米阶段,器件的物理尺寸日益减小,芯片的可靠性设计面临的问题越来越复杂。为缩短研制周期,节约成本,应在电路设计时就考虑可靠性问题。ESD是CMOS电路中最为常见的失效机理之一,严重的会造成电路自我烧毁。概述了集成电路的可靠性设计,介绍了CMOS集成电路ESD保护的必要性,分析了ESD的失效机理,研究了在CMOS电路中几类常见的ESD保护方法,分析了各种保护方式的原理和特点。As the integrated circuit developing to deep-sub micron, the characteristic dimension of IC device is decreasing day by day, and the reliability design, with a lot of complex technical problems, should be considered firstly for shortening the development cycle and saving the cost. Electrostatic discharge（ESD） is one of the most common reliability issues in the integrated circuit（IC） industry, which may cause the burnout of circuits. The reliability design of IC is introduced and the necessity of ESD protection for CMOS IC and ESD failure mechanism is presented. The ESD protection methods used in CMOS IC are discussed and their features are analyzed. The electrostatic discharge protection methods and features used in deep-sub micron CMOS IC are discussed as well.

关 键 词：可靠性 静电放电 ESD保护电路 集成电路工艺 晶闸管 栅接地场效应管 

分 类 号：TN40[电子电信—微电子学与固体电子学]