机构地区:[1]青岛大学计算机科学技术学院,山东青岛266071 [2]青岛大学系统科学博士后流动站自动化与电气工程学院,山东青岛266071 [3]山东大学山东省软件工程重点实验室,济南250101 [4]中国科学院信息工程研究所信息安全国家重点实验室,北京100093
出 处:《计算机学报》2017年第5期1092-1108,共17页Chinese Journal of Computers
基 金:国家自然科学基金(61402245;61572267;61272425;61170106;11472144);国家科技支撑计划子课题(2014BAG03B05);"十二五"国家密码发展基金(MMJJ201301011);中国博士后科学基金第八批特别资助(2015T80696);中国博士后科学基金面上项目(2014M551870);山东省自然科学基金(ZR2014FQ010);青岛市博士后应用研究项目;山东省软件工程重点实验室开放课题(2013SE01)资助~~
摘 要:与其他公钥密码算法相比,椭圆曲线密码算法(Elliptic Curve Cryptography,ECC)具有抗攻击能力强、计算量小以及处理速度快等优点,已成为下一代公钥密码体制的标准.随着ECC在嵌入式领域的应用日益广泛,如何提高其执行效率成为目前研究的热点问题.文中提出了一套通用的专用指令处理器(Application Specific Instruction Processor,ASIP)的设计验证方案,并将该方案应用于ECC,从而大幅提升其在硬件资源受限的嵌入式环境中的执行效率.首先借鉴并实现了OpenSSL公开的ECC软件优化方案,并结合处理器平台的特点对大整数乘法运算和多项式平方运算进行了进一步优化.其次对优化后的算法进行基本指令块(Basic Instruction Block,BIB)的划分并转化为数据流图(Data Flow Graph,DFG),在DFG图中依照专用指令设计规则引入近似最优解方法查找可优化指令块.对该类指令块设计相应的专用指令,以实现处理器原有基础指令集架构的扩展.再次基于电子系统级(Electronic System Level,ESL)设计方法依次设计并仿真验证ECC_ASIP的系统级模型和Verilog寄存器传输级(Register Transfer Level,RTL)模型.最后将验证通过的RTL级处理器模型进行综合、布局布线,转换成相对应的门级电路并统计模型使用的硬件资源信息,烧写到FPGA(Field-Programmable Gate Array)平台完成ECC_ASIP的移植操作和性能验证.与ARM11处理器平台下算法实现的性能表现进行对比,实验结果显示,ECC_ASIP牺牲了9.23x%的硬件扩展资源,将算法实现的运算速度提高了2.74x倍,指令代码存储空间减少了59.36x%.Compared with other public-key cryptographies,elliptic curve cryptography(ECC)possesses the advantages of the good ability of resistance to the attack,reduced calculation and fast processing speed,and it has become the public key cryptosystem standard of the next generation.With the widespread application of ECC in embedded domain,how to increase the effect becomesa hotspot in the current study.This paper proposes a general design scheme for the application specific instruction processor,which is applied to ECC,intending for the obvious promotion of execution efficiency in the embedded environment of limited hardware resources.First of all,optimize the software for the implementation processes of ECC based on the OpenSSL open software optimization method.Considering the characteristics of the processor platform,make further improvements of the filed multiplication arithmetic and the polynomial squaring arithmetic.Secondly,divide the basic instruction blocks(BIBs)for the optimized realization of algorithm and transfer them into the corresponding data flow graphs(DFGs).Locate the instruction blocks that can be optimized in each DFG in accordance with the special instruction design rules,by virtue of the approximate optimal solution method.And then,design the special multiple corresponding instruction for this type of instruction blocks,to realize the extension of the original basic instruction set architecture(ISA)of the processor.Next,design successively and verify the system level model and the Verilog register transfer level model of ECC_ASIP in turn with the electronic system level designing(ESL)approach introduced.In the end,synthesize,place and route the RTL processor model comprehensively,which has passed the verification,and convert it into the corresponding gate-level circuits and calculate out the resource information that the model use.Finally,write the information into FPGA to finish the transplantation and performance verification of ECC_ASIP.Compared with the ARM11 processor model,it has been proved i
关 键 词:椭圆曲线密码 专用指令处理器 近似最优解方法 指令集架构扩展 FPGA
分 类 号:TP309[自动化与计算机技术—计算机系统结构]
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