基于代理模型的处理器结构设计空间探索算法  

Surrogate Model Based Processor Architectural Design Space Exploration Algorithm

作　　者：王宏伟[1,2,3] 朱子元[1,2] 石晶林[1,2] 苏泳涛[1,2] 石红梅[1,2,3] 刘智国[1,2,3] 

机构地区：[1]移动计算与新型终端北京市重点实验室,北京100190 [2]中国科学院计算技术研究所,北京100190 [3]中国科学院大学,北京100190

出　　处：《系统仿真学报》2017年第5期1077-1085,共9页Journal of System Simulation

基　　金：国家自然科学基金(61431001);国家科技重大专项基金(2015ZX03001026-002)

摘　　要：提出了一种新颖的基于代理模型的惩罚距离多目标期望改善(Penalty-Distance Multi-Objective Expected Improvement,PDMOEI)算法用于处理器结构设计空间探索(Design Space Exploration,DSE):利用克里金插值技术构建一个代理模型,采用基于代理模型的PDMOEI算法搜索帕雷托点集,得到关于多目标全局优化的结构参数配置。将提出的算法与MOEI(Multi-Objective Expected Improvement)算法、NSGA-II(Non-dominated Sorting Genetic Algorithm II)算法以及MA-NSGA-II(Metamodel-Assisted NSGA-II)算法,通过两组实验进行了比较。以近似帕雷托点相对于真实帕雷托点的相近程度及覆盖程度为评价指标,得出所提算法均优于其他算法。A novel surrogate model based penalty-distance multi-objective expected improvement （PDMOEI） algorithm was proposed for processor architectural design space exploration （DSE）： first using a Kriging interpolation technique to construct a surrogate model, then adopting the surrogate model based PDMOEI algorithm to search the Pareto points and finding the globally multi-objective optimized architectural parameter configurations. The proposed algorithm was compared with the multi-objective expected improvement （MOEI） algorithm, the non-dominated sorting genetic algorithm Ⅱ （NSGA-Ⅱ） algorithm and the metamodel-assisted NSGA-Ⅱ （MA-NSGA-Ⅱ） algorithm by performing two experiments. Experimental results show that, the proposed algorithm achieves better Pareto points pursuing performance than the other algorithms in both the closeness of the obtained approximating Pareto Doints to the actual Pareto points and the coverage of the actual Pareto points.

关 键 词：设计空间探索 代理模型 克里金插值 多目标期望改善 

分 类 号：TP391.9[自动化与计算机技术—计算机应用技术]