一种评估单粒子效应的XDL网表级电路拓扑关系构建方法  

A Method of Constructing Logical Topology in Circuits for Assessing Single Event Effects Based on XDL Netlist

作　　者：高翔[1] 周国昌[1] 赖晓玲[1] 朱启[1] 杨玉辰[1] 

机构地区：[1]中国空间技术研究院西安分院,西安710000

出　　处：《空间电子技术》2017年第1期9-14,共6页Space Electronic Technology

摘　　要：针对空间环境中的单粒子效应对可编程逻辑器件电路信号传播的影响,提出了一种可评估单粒子软错误传播的网表级电路传播拓扑关系的构建方法。该方法借助综合后的XDL网表与器件资源映射关系,以深度搜索方法和单粒子敏感控制配置位匹配法则,构建基于器件底层资源架构的电路逻辑拓扑关系,细化了电路中的单粒子软错误传播过程。最终,以16分频电路为例简述本方法的实现过程,证明该方法在提升单粒子软错误率计算精度方面的有效性。For the effect of signal propagation in the programmable logic device caused by SEE（ single event effects） of the space environment, a method of constructing circuit netlist-level signal propagation topology for assessing soft error by SEE is proposed in this paper. This method makes use of the mapping relationship between the synthesized XDL netlist and the device resource.Then the logical topology in circuits is built based on the physical architecture of device sources though the algorithm of depth first search and the matching rules of control configuration bits vulnerable by SEE. So this method could be helpful to analysis the transmission of soft error in circuits caused by SEE.Ultimately, an example of 16 frequency division circuit is used to verify this method effectively that the evaluation of mitigating SEE in circuit system could be im-proved.

关 键 词：SRAM型FPGA器件 前向电路 电路节点 单粒子软错误 XDL网表 

分 类 号：V443[航空宇航科学与技术—飞行器设计]