基于LabVIEW和FPGA的虚拟逻辑分析仪设计与测试  

Design and testing of virtual logic analyzer based on LabVIEW and FPGA

作　　者：孙沛[1] 李冶[1] 

机构地区：[1]吉林大学仪器科学与电气工程学院,吉林长春130026

出　　处：《实验技术与管理》2017年第5期122-126,共5页Experimental Technology and Management

基　　金：吉林省重点科技成果转化项目(20130303015GX)

摘　　要：为实现逻辑分析仪的普及应用和提高仪器的可维护性,设计了一种基于虚拟仪器技术和模块化设计思想的虚拟逻辑分析仪。该虚拟逻辑分析仪以FPGA为硬件基础,搭建测试电路,实现对16路数据的并行采集,完成毛刺检测等功能,增强了扩展性。利用LabVIEW编写用户应用界面,实现软件的控制流程、数据的处理分析等功能。给出了该虚拟逻辑分析仪在实际电路中的应用测试效果。In order to effectively realize the application of logic analyzer and improve its maintainability, a virtual logic analyzer based on virtual instrument technology and modular design idea is designed for the experimental teaching application in colleges and universities.It uses the FPGA as the hardware foundation, builds the test circuit, realizes the parallel acquisition of the 16-channel data, completes the glitch detection and other functions, enhances the scalability, by using LabVIEW to write the user application interface, and realizes the software control flow, the data processing analysis and other function.Finally, the application testing effect of the virtual logic analyzer in the practical circuit is given.

关 键 词：逻辑分析仪 虚拟仪器 FPGA LabVEW 

分 类 号：TM932[电气工程—电力电子与电力传动]