Avalon总线的音频编解码控制器IP核设计  

Audio Codec Controller IP Core Design Based on Avalon Bus

作　　者：秦玉龙[1] 

机构地区：[1]宿迁学院信息工程学院,宿迁223800

出　　处：《单片机与嵌入式系统应用》2017年第6期60-62,79,共4页Microcontrollers & Embedded Systems

摘　　要：介绍了基于Avalon总线的WM8731音频编解码控制器IP核的设计,包括音频数据访问接口模块和Avalon-MM接口模块等,并利用SOPC技术将其封装成可重用的IP核。自定义IP核的使用,有效降低了该芯片的开发难度,同时也使系统易于扩展和升级,具有较高的灵活性。在Quartus Ⅱ和ModelSim下使用VHDL语言完成了控制器的设计、仿真以及Nios Ⅱ系统的构建,并通过SignalTap Ⅱ逻辑分析仪进行了硬件测试。仿真和测试结果表明,该控制器满足WM8731各项时序要求。In the paper, the design of WM8731 audio codec controller IP core hased on the Avalon bus is designed, including the codec data access interface module and the Avalon-MM interface module, which is encapsulated into reusable IP cores using SoPC technology. The use of custom IP core can effectively reduce the difficulty of the development of the chip, and makes the system easy to expand and up- grade,and it has the advantages of high flexibility.The design and simulation of the controller and the construction of Nios II system are completed in Quartus II and ModelSim using VHDL,and the hardware verification is performed using SignalTap Ⅱ logic analyzer. The simulation and test results show that the controller can meet the timing requirements of WM8731.

关 键 词：音频编解码 自定义IP核 AVALON总线 NiosⅡ 

分 类 号：TN912.2[电子电信—通信与信息系统]