星载图像压缩系统中实时二维小波变换的FPGA设计与实现  

FPGA Design and Implementation of Real-time 2D-DWT in Space Image Compression System

作　　者：王鸣哲[1,2] 薛长斌[2] 张学全[2] 

机构地区：[1]中国科学院大学,北京100190 [2]中国科学院国家空间科学中心,北京100190

出　　处：《微电子学与计算机》2017年第7期33-36,41,共5页Microelectronics & Computer

摘　　要：CCSDS空间图像压缩标准中采用了三级二维小波变换,此变换适合在可编程逻辑电路上实现.本文提出了一种能够满足实时处理要求的二维5/3小波变换的硬件架构.该架构利用了小波变换的局域性,采用流水线设计,实现了行变换与列变换的同时执行,并且在多级小波变换的架构中也采用了流水线设计.本文架构能够显著减少对图像的反复缓存所造成的时间延迟和片外RAM的使用量,提高了变换速率,并且充分利用了FPGA片内资源,降低片外RAM的使用需求.本文架构经验证能够为后续的数据编码和传输提供有利条件,可以满足对图像进行实时处理的速度要求.The standard recommended by CCSDS for space image compression includes a three-level two-dimensional discrete wavelet transform, which is suitable for design and implementation on logical circuit. In this article, a VLSI architecture of 5/3 2D-DWT is proposed, which can meet the demand of real-time processing. This structure adopts pipelined designing and uses the localization of wavelet to compute row and column transform in the same time. As for three-level discrete wavelet transform, this structure adopts pipelined designing either. This structure can reduce the memory usage and the delay of read and write, increase the speed of wavelet transform, make full use of logical resources of FPGA, and reduce the demand of external RAM. Experiment results show that this structure can meet the demand of real-time processing entirely, and provided favorable conditions for coding and transmission.

关 键 词：CCSDS图像压缩标准 提升小波变换 实时性 FPGA 

分 类 号：TN911.7[电子电信—通信与信息系统]