自偏置PLL电源噪声敏感度分析  

Sensitivity Analysis of Power Supply Noise Induced Jitter in Self Biased PLL

作　　者：李天一[1,2] 许晓冬[1] 尹韬[1] 韦援丰[1,2] 黄国城[1,2] 李威[1] 杨海钢[1] 

机构地区：[1]中国科学院电子研究所,北京100190 [2]中国科学院大学,北京100049

出　　处：《电子与信息学报》2017年第7期1646-1650,共5页Journal of Electronics & Information Technology

基　　金：国家自然科学基金(61271149,61474120)~~

摘　　要：该文提出一种基于传递函数的有效方法,可以预测自偏置PLL电源噪声引起的抖动性能。PLL的复制偏置调整器的电源噪声敏感度由小信号分析提取,分析表明需要在闭环带宽和电源噪声敏感度之间做权衡。作为例子,该文分析了一款具体的自偏置PLL电路的电源噪声性能,该PLL为一款相位插值CDR提供时钟。所提方法与瞬态仿真的结果进行了对比,结果表明该方法可以预测周期抖动数值,具有相当精度。同样,该方法也对提高自偏置PLL噪声性能有指导意义。This paper presents an effective method based on transfer function to predict the jitter performance of self biased PLL due to power supply noise. The supply noise sensitivity of replica biased regulator of PLL is derived from small signal analysis. The analysis shows that there exist tradeoffs between the closed-loop bandwidth and supply noise sensitivity of regulator. As an example, the supply noise performance of one specific self biased PLL which is used as a clock generator in PI based CDR is analyzed. The comparison between transient simulation method and the proposed method is made. The results show that the proposed method can predict the value of period jitter with considerable accuracy. It can also give guidelines on how to further improve the noise performance of SBPLL.

关 键 词：电源噪声抑制 自偏置PLL 噪声传递函数 周期抖动 

分 类 号：TN86[电子电信—信息与通信工程]