基于CORDIC算法的动态FIR数字滤波器FPGA实现与应用  被引量:6

FPGA implementation and application of dynamic FIR digital filter based on CORDIC algorithm

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作  者:宋定昆 刘桂雄[1] 唐文明[1] 

机构地区:[1]华南理工大学机械与汽车工程学院,广东广州510640

出  处:《中国测试》2017年第7期97-102,共6页China Measurement & Test

基  金:国家重大科学仪器设备开发专项(2013YQ230575);广州市科技计划项目(201509010008)

摘  要:传统动态FIR数字滤波需要将大量滤波器系数存入FPGA中,该文提出一种基于CORDIC算法的动态FIR数字滤波器实现方法,通过CORDIC算法对随信号参数动态变化的滤波器系数进行实时计算,节省大量FPGA内存资源。实验表明:基于CORDIC算法的动态FIR数字滤波器系数计算绝对误差小于±4×10-3,动态滤波器阻带衰减达-50 d B以上,具有准确度高、实时性好、占用内存少的特点。将该动态FIR数字滤波器应用于超声相控阵回波信号动态滤波,取得较好滤波效果。Mass filter coefficients were required to be deposited into FPGA memory to realize traditional dynamic FIR digital filtering. A method of dynamic FIR digital filter based on CORDIC algorithm was proposed in this paper, which could adopt CORDIC algorithm to calculate the filter coefficients with the change of signal parameters at real time, and save a lot of FPGA memory resources. Test results show that the coefficient calculation error of FIR digital filter based on CORDIC algorithm is less than ±4×10^-3,and the stop-band attenuation of dynamic filter is more than -50 dB,which is featured by high accuracy, excellent real -time performance and less required memory. Excellent filtering effect can be obtained by applying FIR digital filter to ultrasonic phased array echo signal dynamic filtering.

关 键 词:动态滤波器 坐标旋转数字计算机算法 有限脉冲响应 分布式算法 现场可编程门阵列 

分 类 号:TP301.6[自动化与计算机技术—计算机系统结构]

 

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