基于三值光学计算机的并行快速Fourier算法实现  

Implementation of parallel FFT algorithm on a ternary optical computer

作　　者：彭俊杰[1] 魏鑫燏 张晓峰 沈云付[1] 付友谊 Junjie PENG Xinyu WEI Xiaofeng ZHANG Yunfu SHEN Youyi FU(School of Computer Engineering and Science, Shanghai University, Shanghai 200444, China Shanghai Advanced Research Institute, Chinese Academy of Sciences, Shanghai 201210, China National Key Laboratory of Science and Technology on Millimeter-wave Remote Sensing, Beijing 100854 China)

机构地区：[1]上海大学计算机工程与科学学院,上海200444 [2]中国科学院上海高等研究院,上海201210 [3]毫米波遥感技术国家级重点实验室,北京100854

出　　处：《中国科学：信息科学》2017年第7期846-862,共17页Scientia Sinica(Informationis)

基　　金：国家自然科学基金(批准号:61572305;61103054);中国航天科工集团二院"自主"创新项目资助

摘　　要：快速Fourier变换(FFT)是信号处理领域应用十分广泛的算法,在高速、实时的应用环境中常用硬件并行实现的方法来加快FFT的运算速度,但在一些特定领域如在空间受限、对能耗及散热具有较高要求的航空航天设备中,传统的电子方法将受到很大的局限,而三值光学计算机以其能耗低、数据位数众多的优点使得它可能具有广泛的应用前景.针对这种现状,本文研究了采用三值光学计算机来实现快速Fourier变换的设计方案和方法.通过对传统基2、基4和基8时域抽取快速Fourier变换运算过程的分析,利用三值光学计算机数据位数众多和数据位数易扩展的特点设计了多个并行度更高的快速Fourier变换算法,给出了详细的算法实现流程并进行了各算法间的对比,分析了实现方案所需的时钟周期和硬件资源,模拟验证了该实现方案的正确性.相比于传统基于现场可编程门阵列的并行实现方法,这种在三值光学计算机上实现的快速Fourier变换运算功耗更低、所需时钟周期数更少,这为在嵌入式设备中高速低功耗地实现快速Fourier变换提供了新的解决思路.The Fast Fourier Transform（FFT） is widely used in modern digital signal processing systems. In order to improve the efficiency of FFT, parallel methods are often used to speed up FFT in high-speed real-time application environments. However, due to the restrictions of size, energy consumption, heat dissipation etc.,traditional electronic methods are becoming unsuitable for FFT applications in certain areas, such as aviation,aerospace, etc. Due to its characteristics of a massive number of data bits and low energy consumption, the Ternary Optical Computer（TOC） is a potential solution for these special cases. To verify this possibility, we studied the design and implementation of a high-speed parallel FFT on a TOC. Through analysis of the traditional radix-2,radix-4, and radix-8 DIT FFT operation processes, several FFT algorithms with higher parallelism, implemented on TOC, are designed by taking advantage of the characteristics of TOC. The implementation processes of these algorithms and the differences between them are presented. Meanwhile, the clock cycles and hardware resources required for each algorithm are also discussed. Simulation results reveal that the FFT implementation method is accurate. The algorithms require less power and fewer clock cycles when implemented on a TOC compared to the traditional methods implemented on an FPGA. This provides a new possible solution for high-speed low-power FFT implementation.

关 键 词：三值光学计算机 快速FOURIER变换 并行计算 MSD加法器 嵌入式设备 

分 类 号：TN911.7[电子电信—通信与信息系统]