基于PCI Express的多通道动态优先级DMA系统的FPGA设计  

FPGA Design of Multi-channel Dynamic-Priority DMA System based on PCI Express

作　　者：苏永海[1] 黄莉[1] 

机构地区：[1]中国电子科技集团公司第30研究所,四川成都610041

出　　处：《通信技术》2017年第7期1570-1575,共6页Communications Technology

摘　　要：PCI Express由于其高速串行、系统拓扑简单的特点,在通信系统中得到了广泛应用。为了实现PCI Express的DMA传输,设计了一种基于PCI Express的多通道动态优先级DMA系统。该系统的设计核心是多通道DMA控制器和动态优先级仲裁器。通过分析和测试验证表明,基于PCI Express的多通道动态优先级DMA系统具备良好的扩展性和灵活性,每个DMA通道都具备QOS能力,128 Byte数据包的收发速率可达60 Mb/s。随着PCI Express传输速率的不断提高,DMA系统还需在后续研究中进一步优化性能,以适应更高速率的要求。PCI Express, for high-speed serial and simple system topology, is widely used in communication system. In order to realize DMA transmission of PCI Express, the multi-channel dynamic-priority DMA system based on PCI Express is designed. The kernel of this system is a multi-channel DMA controller and a dynamic-priority arbiter. Analysis and testing indicate proved that the multi-channel dynamic-priority DMA system based on PCI Express has good scalability and flexibility, and each DMA channel has QOS capability, and the transceiver rate of 128 Byte packets can reach 60 Mb/s. With the continuous improvement of PCI Express transmission rate, DMA systems need to be further optimized for its performance in follow-up study, thus to meet the requirements of higher rate.

关 键 词：PCI Express DMA FPGA 仲裁器 

分 类 号：TN914.3[电子电信—通信与信息系统]